Integrated circuits (ICs) implement a myriad of capabilities of modern electronic devices. To make the development of ICs more efficient, a semiconductor manufacturer will periodically develop a common fabrication process or “technology” to be used for production of its integrated circuits (for ease of explanation the term “technology” may be used herein to refer to a fabrication process for a semiconductor device structure that is being developed). To develop the next generation technology to meet demands on performance and miniaturization, semiconductor manufacturers and designers of ICs must understand the electrical behavior of the circuits that will be produced by the technology under development. The electrical behavior of a technology can typically be characterized by analyzing the limited number of structures which are then repeated millions of times to create a modern IC. Structures typically include, but are not limited to, transistors for logic or memory, capacitors, resistors, and the interconnect structures formed of the connecting conductive material such as wires or semiconductor material that electrically connect those transistors.
Fabricating experimental semiconductor wafers to measure electrical performance costs significant time and money, and so predicting behavior with software has been vital in technology development since the early days of integrated circuits. Electrical simulation tools that are often part of technology computer-aided design software suites have been used to simulate this electrical behavior to provide guidance in technology development.
Such electrical simulation tools, when applied to technology development, typically take as input a geometric model built from primitive geometric objects such as cubes, spheres, cylinders, or cylinders with polygonal cross section. Those objects have parameters to define their dimensions to create a variety of shapes. For instance, in FIG. 1A (prior art) an interconnect stack 100 includes a via, 102, connecting metal on layer 104 to metal on layer 106 and is defined with three primitives, each a rectangular solid. Each rectangular solid is described with parameters for its length, width, and height, and parameters for its location and orientation in space. These structures may also be formed from idealized structures formed from two-dimensional (2D) drawings also called layouts. For instance, a thickness profile can be attributed to each drawing and then the various thickened 2D structures can be stacked on top of one another to form the structure. The solid geometry represented by either the structures that are composed of primitives, or the idealized structures from layouts, can then be divided into a volume mesh of smaller elements that is necessary for simulation of electrical behavior in conventional software simulation tools. As an example, FIG. 1B (prior art) depicts a solid geometry (of the interconnect stack 100) whose volume has been meshed into tetrahedral elements 108. For those tetrahedra that have a face on the surface, the black lines show shared edges between adjacent tetrahedra. A mesh and the properties of the materials within each element are used by conventional simulators to compute the electrical behavior.